Module wires

This module implements Plonk circuit gate wires primitive.

Modules

caml

wasm

Structs

Wire

Wire documents the other cell that is wired to this one. If the cell represents an internal wire, an input to the circuit, or a final output of the circuit, the cell references itself.

Constants

COLUMNS

Number of registers

PERMUTS

Number of registers that can be wired (participating in the permutation)

WIRES

index of all registers

Traits

Wirable

Since we don’t have a specific type for the wires of a row, we have to implement these convenience functions through a trait.

Type Aliases

GateWires

GateWires document the wiring of a gate. More specifically, each value either represents the same cell (row and column) or a different cell in another row. (This is to help the permutation argument.)